| ФУНКЦИИ | ORCAD | ALLEGRO |
| Плавающая сетевая лицензия | Standard | Artist |
| 12 месяцев технического обслуживания, включенного в стоимость покупки | Standard | Artist |
| ВВОД СХЕМ + УПРАВЛЕНИЕ ДАННЫМИ | | |
| Схемный редактор Capture | Standard | Artist |
| Система управления компонентами CIS | | Designer |
| Схемный редактор System Capture | | Artist |
| Старый схемный редактор DE HDL | | Designer |
| Flexible Window layout | Standard | Artist |
| Graphical, flat and hierarchical page editor and Picture block hierarchy | Standard | Artist |
| OrCAD PSpice AD Basics — Restricted Capacity — see PSpice Matrix below | Standard | Allegro PSpice System Designer |
| Net Groups — Complex bus definition | Standard | Artist |
| AutoWire | Standard | Artist |
| 44000 схематических символов | Standard | Artist |
| Coloured Components / nets | Standard | Artist |
| Tcl TK scripting support | Standard | Artist |
| Online design rule check including custom DRC capability and Waive DRC | Standard | Artist |
| Forward and back-annotation of properties / pin-and-gate swaps | Standard | Artist |
| Schematic Part and Library editor | Standard | Artist |
| Cross-probing and cross-placing | Standard | Artist |
| FPGA design-in / pin import & export | Standard | Artist |
| Multiple PCB netlist interfaces — New Design Sync for Cadence Flow | Standard | Artist |
| Part Search Providers UltraLibrarian and Samacsys (Symbol, Footprint 3d Step Model) | Standard | Artist |
| Property editor for pins, components, nets | Standard | Artist |
| OrCAD SigXplorer SI Analysis | Standard | Artist |
| Intelligent PDF creation | Standard | Artist |
| Advanced Annotation | Standard | Artist |
| Design Compare (detail and Graphical) | Standard | Artist |
| Default Demo designs | Standard | Artist |
| Extended Preferences | Standard | Artist |
| Export ISCF (Intel Schematic Connectivity Format) | Standard | Artist |
| Export / Import XML | Standard | Artist |
| Altium Importer Schematic (PCB also available) | Standard | Artist |
| Eagle Importer Schematic (PCB also available) | Standard | Artist |
| Constraint Manager | Standard | Artist |
| Component Information System | CIS option | Designer |
| Windows ODBC compatible format | CIS option | Designer |
| Interface to relational database and management systems | CIS option | Designer |
| Database query for part selection and parametric properties | CIS option | Designer |
| Schematic and BOM Variants Manager (Parts not Fitted and more). | CIS option | Designer |
| Component Information Portal (CIP), Access to Mouser, Digikey, Future, Farnell | CIS Option + CIP E Option | CIP E Option |
| PCB РЕДАКТОР | | |
| Spacing, Same net, Netclass and Class to Class rules | Standard | Artist |
| Physical Constraint Rules | Standard | Artist |
| DesignTrue DFM Wizard | Standard | Artist |
| Design for Test Checks | Standard | Artist |
| Design For Assembly Checks | Standard | Artist |
| Design For Fabrication Checks | Standard | Artist |
| Version Control | Standard | Artist |
| Component Lead Editor | Standard | Artist |
| Import File Manager | Standard | Artist |
| DFM Pad Entry / Exit Rules | Standard | Artist |
| Dynamic pad suppression / Unused Pad removal | Standard | Artist |
| Cross Section Editor | Standard | Artist |
| Padstack Editor IPC2581 Compliant | Standard | Artist |
| Application Mode (General, Etch, Placement) | Standard | Artist |
| Application Mode (shape) | Standard | Artist |
| Full Skill language Support | Standard | Artist |
| Customisable Visibility Pane | Standard | Artist |
| Dynamic Shape Pin Connection By Layer (Global/Shape/Pin/Layer) | Standard | Artist |
| Dynamic Cross Hatch Shapes | Standard | Artist |
| Dynamic Shapes (dynamic copper pours) Plow and Heal | Standard | Artist |
| Move with autoroute adjust (Slide) | Standard | Artist |
| Multiple placement options, manual, quickplace, auto and room | Standard | Artist |
| Alignment x and y for components and modules | Standard | Artist |
| Dynamic rat suppression | Standard | Artist |
| Fan-out generators | Standard | Artist |
| Interactive Routing using Working Layer (layer selection popup) | Standard | Artist |
| Group route Bus Route and via patterns | Standard | Artist |
| Line Fattening | Standard | Artist |
| Differential Pair Static Phase Control rules | Standard | Artist |
| Differential Pairs Physical rules and routing | Standard | Artist |
| Blind Buried Single Click multiple via instantiation | Standard | Artist |
| Push, Shove and Hug interactive editing | Standard | Artist |
| Curve Routing | Standard | Artist |
| Snake Routing for Hex pattern ICs | Standard | Artist |
| Auto Finish (Route Completion Tool) | Standard | Artist |
| Scribble Sketch Routing | Standard | Artist |
| Route cleanup, optimization (Glossing) | Standard | Artist |
| Embedded net names | Standard | Artist |
| Split View | Standard | Artist |
| Through Board Transparency (OpenGL) | Standard | Artist |
| Flip Board | Standard | Artist |
| Excellon NC Drill File export | Standard | Artist |
| Gerber 274X, 274D artwork Output | Standard | Artist |
| IPC2581 Import / Export | Standard | Artist |
| Mentor ODB++ and universal viewer | Standard | Artist |
| Impedance Calculator | Standard | Artist |
| Interactive / Automatic Silkscreen generation | Standard | Artist |
| Import Altium PCB (schematic also available) | Standard | Artist |
| Import EAGLE PCB (schematic also available) | Standard | Artist |
| Import PADS & PCAD | Standard | Artist |
| Import IFF RF Shapes | Standard | Artist |
| Import Export DXF | Standard | Artist |
| Import Export IDF | Standard | Artist |
| Export Intelligent PDF | Standard | Artist |
| MCAD/ECAD Incremental design data exchange (IDX) | Standard | Artist |
| 3D/2D Crossprobing | Standard | Artist |
| STEP 3D Clash Detect | Standard | Artist |
| STEP 3D viewer for selected item or complete PCB | Standard | Artist |
| STEP 3D Canvas Controls | Standard | Artist |
| STEP 3D Import Export | Standard | Artist |
| STEP 3D Canvas Highlight Selections | Standard | Artist |
| Manual Design For Test (DFT) / Test Prep | Standard | Artist |
| Associative Dimensioning | Standard | Artist |
| Autoroute Nets by Pick, 6- Signal Layers, no layer limit or Pin Limit | Standard | Artist |
| Autoroute Automatic, 6- Signal Layers, no layer limit or Pin Limit | Professional | Artist |
| Net Scheduling, T-Point rules (pin to T-point), T-Point definition | Professional | Artist |
| Constraint Regions, region based rules (Rigid-Flex; BGA regions) | Professional | Artist |
| Propagation delay rules (Relative) for nets or groups | Professional | Artist |
| Propagation delay rules (Min/Max) for nets or groups | Professional | Artist |
| Total Etch Length — Max/Min Length | Professional | Artist |
| Extended (X)net rules | Professional | Artist |
| Layer set rules | Professional | Artist |
| Pin Pair rules | Professional | Artist |
| Delay Tuning | Professional | Artist |
| Dynamic Heads-up Display for critical rules | Professional | Artist |
| Hug Contour routing (Flex) | Professional | Artist |
| Segment over void detection | Professional | Artist |
| Spread lines between voids | Professional | Artist |
| Shape based curve fillet support, tapered traces | Professional | Artist |
| Placement replication, template based design reuse | Professional | Artist |
| Via array / Shielding — Shape and Trace based | Professional | Artist |
| Rigid Flexi Zone Management | Professional | Artist |
| Dynamic Zone Placement | Professional | Artist |
| Inter Layer Checks for Rigid Flexi | Professional | Artist |
| 3D Bending | Professional | Artist |
| High Speed Analysis Impedance Workflow | Professional | Artist |
| High Speed Analysis Coupling Workflow | Professional | Artist |
| Placement Vision | Professional | Artist |
| Route Vision | Professional | Artist |
| Differential Pair Dynamic Phase Control rules | Professional | Artist |
| Package Pin Delay (for die-2-die delay) rules | Professional | Artist |
| Z-Axis delay feedback | Professional | Artist |
| Backdrilling | Professional | Artist |
| Automatic Design For Test (DFT) / Test Prep | Professional | Artist |
| Panelization | Professional | Artist |
| Match / Max Via Count rules | | Artist |
| Offset Routing | | Designer |
| Design planning — Create hierarchical Bundles | | Designer |
| Design planning — Create, Edit Flows, Assign Flows to Layers | | Designer |
| Dynamic Shape based curve fillet support, tapered traces | | Artist |
| CAD Translators — Import Mentor Boardstation | | Designer |
| RF Traces | | Artist |
| Design Link (Link Constraints from multiple boards) | | Artist |
| Design For Assembly — Placement Control | | Designer |
| Electrical Constraint Set (ECSet) Reuse | | Artist |
| Chip on Board | | Designer |
| Allegro Constraint Compiler | | High-Speed Option |
| High Speed Return Path DRC | | High-Speed Option |
| High Speed IR Drop Analysis Workflow (load capability) | | High-Speed Option |
| High Speed Reflection Analysis Workflow (load capability) | | High-Speed Option |
| Timing Environment — Auto Delay Tune (AiDT), Auto Phase Tune (AiPT), Remove Tuning | | High-Speed Option |
| Tabbed Routing | | High-Speed Option |
| Electrical Constraint rule set (ECSets) / Topology Apply | | High-Speed Option |
| Electrical rules (Reflection, Timing, Crosstalk) | | High-Speed Option |
| Advanced Constraints (formulas, relational) | | High-Speed Option |
| Fibre Weave Effect Zig Zag Auto Interactive | | High-Speed Option |
| High Speed Static Phase Via Transition DRC | | High-Speed Option |
| Via Voiding Differential Pairs | | High-Speed Option |
| Single net Return Paths Vias | | High-Speed Option |
| High Speed Differential Pair Return Path Vias | | High-Speed Option |
| High Speed Intra Differential Pairs Spacing Rules | | High-Speed Option |
| High Speed Via Structures | | High-Speed Option |
| High Speed Inductance Via Structures | | High-Speed Option |
| Constraint Manager: HDI rule set | | Miniaturization Option |
| Micro-via and associated spacing, stacking and via-in-pad rules | | Miniaturization Option |
| Constraint driven HDI design flow | | Miniaturization Option |
| HDI micro-via stack editing | | Miniaturization Option |
| Manufacturing rule support for embedding components | | Miniaturization Option |
| Embed components on inner layers | | Miniaturization Option |
| Support for Cavities on inner layers | | Miniaturization Option |
| Support for Vertically placed components on inner layers | | Miniaturization Option |
| Soldermask for embedded components | | Miniaturization Option |
| Support for copy and swap embedded components | | Miniaturization Option |
| Dual Side Contact Embedded Components | | Miniaturization Option |
| Design Planning — Plan Spatial Feasibility analysis & feedback | | Design Planning Option |
| Design Planning — Generate Topological Plan | | Design Planning Option |
| Design Planning — Convert Topological plan to traces (CLINES) | | Design Planning Option |
| Auto Interactive Break-out (AiBT) | | Design Planning Option |
| Auto Connect (Breakout, Connect, Compress, Spread, Nudge, Push) | | Design Planning Option |
| Symphony Team Design New Option, one board with multiple designers in real time | | Symphony Team Design Option |
| Swap pins on a FPGA (based on FPGA rules) in PCB Editor | | FPGA System Planner |
| Reoptimize pins on a FPGA (using FPGA rules) | | FPGA System Planner |
| Parameterized RF etch elements | | Analog / RF Option |
| Asymmetrical Clearances | | Analog / RF Option |
| RF Etch elements editing | | Analog / RF Option |
| Bi-Directional interface with Agilent ADS | | Analog / RF Option |
| ADS schematics Import Agilent into DE-HDL | | Analog / RF Option |
| Layout-driven RF design creation | | Analog / RF Option |
| Flexible Shape Editor | | Analog / RF Option |
| PSpice SIMULATION | | |
| Bias Point, DC sweep, AC sweep & transient analysis (with Temperature) | PSpice AD | PSpice AD |
| Parametric Analysis | PSpice AD | PSpice AD |
| Learning PSpice Free Templates | PSpice AD | PSpice AD |
| Analog behavioural modelling | PSpice AD | PSpice AD |
| Stimulus editor | PSpice AD | PSpice AD |
| Model Editor for device characterization | PSpice AD | PSpice AD |
| Interactive waveform viewer & analyzer | PSpice AD | PSpice AD |
| IBIS / DML model support | PSpice AD | PSpice AD |
| Monte Carlo: Statistical circuit behaviour and yield (Worst Case) | PSpice AD | PSpice AD |
| Bias point voltages, currents and power display on schematic | PSpice AD | PSpice AD |
| Example Design Simple Circuit 1 | PSpice AD | PSpice AD |
| Example Design Simple Circuit 2 | PSpice AD | PSpice AD |
| Example Design Simple Circuit 3 | PSpice AD | PSpice AD |
| Example Design Simple Circuit 4 | PSpice AD | PSpice AD |
| Example Design Simple Circuit 5 | PSpice AD | PSpice AD |
| Example Design Simple Circuit 6 | Spice AD | PSpice AD |
| Example Design Simple Circuit 7 | PSpice AD | PSpice AD |
| Sensitivity: Identifies critical circuit components | Advanced Analysis | Advanced Analysis |
| Optimizer: Optimizes key circuit components | Advanced Analysis | Advanced Analysis |
| Monte Carlo: Statistical circuit behaviour and yield multiple measurements | Advanced Analysis | Advanced Analysis |
| Smoke: Detects component stress | Advanced Analysis | Advanced Analysis |
| Parametric Plotter: Examine solution through nested sweeps | Advanced Analysis | Advanced Analysis |
| Optimize Circuits through Curve or Parameter Fit | Advanced Analysis | Advanced Analysis |
| SIGNAL INTEGRITY | | |
| Pre-route signal integrity analysis | Standard | Artist |
| Pre-route & Post-route signal integrity analysis | Professional | Aurora |
| Graphical topology definition and exploration | Standard | Artist |
| Interactive waveform viewer | Standard | Artist |
| Macro modelling support (DML) | Standard | Artist |
| IBIS 5.0 support | Standard | Artist |
| IBIS ICM model support | Standard | Artist |
| Spectre-to-DML | Standard | Artist |
| HSPICE-to-IBIS | Standard | Artist |
| Lossy transmission lines | Standard | Artist |
| Coupled (3 net) simulation Pre-Route | Standard | Artist |
| Differential pair exploration and simulation | Standard | Artist |
| Standalone AutoRouter | Professional | Artist |
| 6 Signal Layers at a time (no board layer limit or pin limit) | Professional | Artist |
| Shape-based or Gridded routing | Professional | Artist |
| SMD Fanout | Professional | Artist |
| Physical Trace Width by Net and Net Classes | Professional | Artist |
| 45-degree / Memory Pattern Routing | Professional | Artist |
| Interactive Routing with Shoving and Plowing | Professional | Artist |
| Interactive Floorplanning | Professional | Artist |
| Online Design Rule Checking | Professional | Artist |
| Flip, Rotate, Align, Push, and Move Components | Professional | Artist |
| Placement Density Analysis | Professional | Artist |
| Min/Max, matched length rules based autorouting | | Artist |
| Pin-pair rules, Area rules based autorouting | | Artist |
| Crosstalk controls, parallelism rules based autorouting | | Artist |
| Differential Pair Autorouting, Automatic net shielding | | Artist |
| High-speed rules-based autorouting | | Artist |
| 256 signal layer limit | OrCAD AI Option | Routing Option |
| DFM rules-based autorouting automatic trace spreading, via reduction and mitering | | Routing Option |
| Spacing Net Class — Class Rules | | Routing Option |
| Via Rules by Net and Net Class | | Routing Option |
| Mircovia features including Plural and Stacked microvias | | Routing Option |
| Auto Test Point Generation and Clearance Rules | | Routing Option |
| Layer-specific rules-based autorouting | | Routing Option |
